Silicon Laboratories International Pte Ltd – Digital Design Engineering Intern

The Role:

The intern will participate in specification, architecture, design, verification, and synthesis of MCU based, mixed signal integrated circuits. He/she will also be a technical interface through production ramp.

Responsibilities:

• Implement digital design through complete design flow - from specification to Verilog design and  verification
• RTL / gate level and block / subsystem design, simulation, and debug
• Verilog behavioral modeling of analog and mixed signal circuits
• Create verification self-checked test cases
• Perform prototype design verification in FPGA platform
• Perform backend digital design (logic synthesis, formal check, define design constraints for place & route, supervise place and route, perform timing closure)
• Lab test development and evaluation of engineering samples
• Write design document
• Assist test program development

Education and/or Experience:

• PhD or MSEE with advanced understanding of engineering fundamentals
• Good knowledge of digital IC circuit design in an HDL synthesis environment
• Good knowledge in RTL development with using synthesis and timing tool
• Familiar with using a script language
• Able to analyze a digital gate using SPICE
• Experienced in using FPGAs for design verification
• Good communication and organization skills