Infineon Technologies Asia Pacific Pte. Ltd. – SoC Testerpattern Development

Company
Infineon Technologies Asia Pacific Pte. Ltd.
infineon.com
Designation
SoC Testerpattern Development
Date Listed
04 Jul 2016
Job Type
Entry Level / Junior Executive
Intern/TS
Job Period
Immediate Start, For At Least 6 Months
Profession
Engineering, Sciences / Laboratory / R&D
Industry
Location Name
8 Kallang Sector
Allowance / Remuneration
$1,500 - 1,750 monthly
Company Profile

At Infineon, we make life easier, safer and greener with microelectronics that harness more energy with less resources, give better performance with less energy, and more mobility with less CO2. We operate with a responsibility for a better and more sustainable future for our society.

Infineon (IFAP) is a pioneer of Singapore’s semiconductor industry. First established in 1970 as Siemens Components, we have grown and transformed in scale and scope. Today, IFAP is the Asia Pacific headquarters, a major R&D centre and the global test manufacturing and distribution hub for Infineon.

Headquartered in Munich, Germany, the company has a workforce of about 2,100 in Singapore. Infineon is committed to fair employment practices; we were among the first to sign the Employers’ Pledge with the Tripartite Alliance for Fair & Progressive Employment Practices (TAFEP) and are honoured to be shortlisted as a finalist for TAFEP Exemplary Employer Award 2016.

Infineon supports work-life integration among employees; the availability of flexible working arrangements and a supportive work environment are not only well-appreciated internally, but also recognized by the likes of NTUC Women’s Development Secretariat with their Best Companies For Mums Award for two consecutive years* and TAFEP with the Work-Life Achiever Award in 2014.

Job Description

In your role you will be doing an internship* at Infineon Design Centre [Automotive SoC Testerpattern Development group [TPD]].

  • You will get to work on Infineon’s flagship Tricore-based Automotive Microcontrollers 
  • You will get hands-on experience on the testerpattern flow/methodologies
    Will be assigned with various activities involving testpattern development
  • You will be responsible for the simulation, debug and delivery of high-quality testerpatterns to the local test-teams and involves co-ordinations with test-teams, verification, design and concept engineering teams
  • You will be exposed to workflows and Infineon’s working standards on various tester platforms such as – Verigy V93k and Teradyne J750 
  • Pattern development in centralized automated environment including pattern simulation & debug
    o Develop patterns using SystemC, Pre-processor languages
  • Assist in CPU-based pattern development methodology 
  • RTL Verification activities at SoC level, of Infineon Automotive microcontroller [32 / 16bit]
    o Involves review of the verification plans, coverage plans, testcase implementation/enhancement, debug
    o Reviews with design and concept engineering teams
    o Involves implementation and working predominantly CAN, LIN protocols
    o Experience in SystemC or any HVL an added advantage
  • Scripting and automating in pattern development environment
    o PERL, Python experience an added advantage
    o Identify potential areas for automation and propose methodology, implementation and documentation
  • Assist in Generic-based platform approach pattern development process
    o You’ll be getting an opportunity to evaluate the existing flow and automated environment followed for testerpattern generations
    o Participate in reviewing and auditing the tooling/methodologies
    o Propose improvised flows and also participate in the Generic-TOP[TestObjectPlatform] initiatives/implementation in the TPD group

Learning Outcomes:

  • Knowledge of complete front end design flow with focus on functional verification
  • Some experience in writing verification plan, creating verification environment, writing testcases, running regression-debug and signoff closure based on metric driven verification approach

You are best equipped for this task if you have:

  • Masters in Electrical or Computer Engineering
  • Familiarity with Design and Verification concepts
  • Basic IP domain knowledge(processor, serial bus protocols..)
  • Proficient in scripting, objected oriented concept, knowhow of HDL and HVL
  • Good written and verbal skills to interact with peers and counterparts
  • Research oriented mind set
  • HDL, HVL like e, systemverilog, C/C++ and perl,tk scripting
  • Familiarity with EDA tools (Simuation, debug, functional coverage)

*Minimum of 6 months is required for this internship, unless with relevant past working experience. Part-time arrangement may also be considered on a case-by-case basis.

This position is already closed and no longer available.  You may like to view the other latest internships here.

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